Nian-Feng Tzeng
Center for Advanced Computer Studies
University of Louisiana at Lafayette
A networked computing system can establish immense memory collectively across its connected nodes for holding pages evicted from the main memory of any participating node during application runs with large working sets. Such cooperative memory expansion (COMEX) may boost process execution performance tremendously, likely to yield far higher job throughputs for data centers and enterprise computing facilities, resulting from holding the huge working set of an execution process via established immense physical memory. We designed, implemented, evaluated, and prototyped COMEX for real assessment on its performance gain potentials under various benchmarks.
The performance of a shared-memory multiprocessor is dictated in part by the
latency of fetching global memory locations through the interconnection network.
We investigated techniques to improve access latency
under various traffic patterns in multiprocessors.
The use of locks for critical sections is fundamental in parallel execution
and efficient lock implementation makes it possible to build scalable,
high-performance parallel systems.
Lock mechanisms for shared-memory machines and distributed-memory machines
have been considered, as an efficient lock makes it feasible to
construct DSM systems on top of the distributed-memory machines,
by enforcing data coherence
without high overhead to ensure good performance.
A graphic processing unit (GPU) may underutilize its physical memory during lengthy machine learning (ML) model training or deep learning (DM). We explored an effective approach that lets memory-intensive applications run on the host machine CPU with its memory expanded dynamically onto available GPU on-board DRAM. Our approach permited speedy executions on CPU with large memory footprints by harvesting unused GPU on-board memory on-demand for swapping. It was implemented in user space as a prototype that lets GPU memory house swapped-out memory pages transparently, without code modifications for high usability and portability. Evaluating NAS-NPB benchmark applications on the prototype demonstrated considerable speedups under both monotasking and multitasking.
New and efficient coordinated checkpointing is developed. It minimizes (1) the checkpointing overhead during failure-free execution and (2) the cost of recovery from failures, realized by leveraging existing coherence information maintained for software distributed shared memory (DSM) to allow failure recovery from the most recent checkpoint. Our checkpointing is demonstrated to consistently outperform its other checkpointing and fault-recovery counterparts.
A hypercube may operate in a gracefully degraded manner after faults arise, by supporting the execution of parallel algorithms in smaller fault-free subcubes. An efficient procedure capable of determining all complete fault-free subcubes in a faulty hypercube has been introduced, based on interesting properties of faulty hypercubes to exhibit empirically polynomial time complexity. Additionally, reconfiguring a faulty hypercube or mesh with an effort to keep as many fault-free nodes as possible has been treated for the first time by us. Different approaches to this maximum reconfiguration have been proposed. It is confirmed by fault simulation that thess proposed approaches indeed give rise to significantly larger reconfigured systems for best retaining computing power.
Multiprocessor design demands a suitable interconnection network. A conventional multisage interconnection network (MIN) may render several outputs inaccessible from certain inputs, upon a single failure. We introduce different schemes for MINs to lift their reliability values, yielding higher reliability improvement than prior counterparts.
Implementing mutual exclusion in large-scale shared-memory multiprocessors requires the use of a lock in global memory, through which synchronization and data exchange are carried out. An efficient lock scheme for multiprocessors interconnected by the multistage interconnection network has been introduced. It keeps synchronization traffic low and avoids serious hot-spot contention, reducing the latency of access to the lock.
A distributed-memory system needs the use of locks for realizing synchronization during parallel program executions. Its data coherence is commonly enforced through mutual exclusion on the data cache lines of processors. Approaches for mutual exclusion in the distributed memory system have been considered so that processors waiting for the critical section will get the permission quickly with as few message exchanges as possible to lift better performance, while ensuring deadlock- and starvation-freeness naturally.
Distributed Shared Memory (DSM) Systems build the shared memory abstract on top of the distributed memory machines, such that the users have a shared-memory environment while message passing are taken care of by the DSM layer. Software DSM performance is particularly sensitive to message communication overhead incurred for memory coherence enforcement. Since performance of DSM is based on the number of messages exchanged during the runtime and the synchronization mechanism dictates the message count involved, efficient synchronization mechanisms we considered arrive at improved overall system performance.
In addition, we pursued placing copies of a certain resource to cube nodes under the situations that the resource diameter is greater than 1. Our approaches adopt the covering radius results of known codes to aid in constructing desired linear codes whose codewords address nodes at which resource copies are placed. They are applicable to any cube size systematically and achieve placement results better than what are derived by previous methods.
Send e-mail to: tzeng@louisiana.edu